WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders

Leonid Yavits, Lois Orosa, Suyash Mahar, Joao Dinis Ferreira, Mattan Erez, Ran Ginosar, Onur Mutlu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

12 Scopus citations

Abstract

Resistive memories have limited lifetime caused by limited write endurance and highly non-uniform write access patterns. Two main techniques to mitigate endurance-related memory failures are 1) wear-leveling, to evenly distribute the writes across the entire memory, and 2) fault tolerance, to correct memory cell failures. However, one of the main open challenges in extending the lifetime of existing resistive memories is to make both techniques work together seamlessly and efficiently. To address this challenge, we propose WoLFRaM, a new mechanism that combines both wear-leveling and fault tolerance techniques at low cost by using a programmable resistive address decoder (PRAD). The key idea of WoLFRaM is to use PRAD for implementing 1) a new efficient wear-leveling mechanism that remaps write accesses to random physical locations on the fly, and 2) a new effiCient fault tolerance mechanism that recovers from faults by remapping failed memory blocks to available physical locations. Our evaluations show that, for a Phase Change Memory (PCM) based system with cell endurance of 108 writes, WoLFRaM increases the memory lifetime by 68% compared to a baseline that implements the best state-of-the-art wear-leveling and fault correction mechanisms. WoLFRaM's average / worst-case performance and energy overheads are 0.51% /3.8% and 0.47% /2.1% respectively.

Original languageEnglish
Title of host publicationProceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages187-196
Number of pages10
ISBN (Electronic)9781728197104
DOIs
StatePublished - Oct 2020
Externally publishedYes
Event38th IEEE International Conference on Computer Design, ICCD 2020 - Hartford, United States
Duration: 18 Oct 202021 Oct 2020

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Volume2020-October
ISSN (Print)1063-6404

Conference

Conference38th IEEE International Conference on Computer Design, ICCD 2020
Country/TerritoryUnited States
CityHartford
Period18/10/2021/10/20

Bibliographical note

Publisher Copyright:
© 2020 IEEE.

Funding

We thank the SAFARI Research Group members for the valuable input and the stimulating intellectual environment they provide, the anonymous reviewers for their feedback, and the industrial partners of SAFARI, especially ASML, Google, Huawei, Intel, Microsoft, and VMware, for their support.

FundersFunder number
Huawei
Intel Corporation
Microsoft
Google

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