Wide Dynamic Range Snapshot APS for Ultra Low-Power Applications

Alexander Fish; Alexander Belenky; Orly Yadid-Pecht

doi:10.1109/tcsii.2005.852193

Wide Dynamic Range Snapshot APS for Ultra Low-Power Applications

Alexander Fish, Alexander Belenky, Orly Yadid-Pecht

Research output: Contribution to journal › Article › peer-review

7 Scopus citations

Abstract

A novel wide dynamic range (WDR) snapshot active pixel sensor for ultra-low power applications is presented. The proposed imager allows capturing of fast moving objects in the field of view and provides WDR by applying adaptive exposure time to each pixel, according to the local illumination intensity level. Driven by low-power dissipation requirements, the proposed pixel is operated by dual low voltage supplies (1.2 and 1.8 V) and utilizes an advanced low-power sensor design methodology. A test chip of a 32 * 32 array has been implemented in a standard 0.35-μm CMOS technology. A single pixel occupies 18 * 32 μm area and is expected to dissipate 18.5 nW at video rate. System architecture and operation are discussed and simulation results are presented.

Original language	English
Pages (from-to)	729-733
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	52
Issue number	11
DOIs	https://doi.org/10.1109/tcsii.2005.852193
State	Published - Nov 2005
Externally published	Yes

Keywords

Active pixel sensor (APS)
low-power sensor
snapshot CMOS imager
wide dynamic range (WDR) sensor

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10.1109/tcsii.2005.852193

Cite this

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abstract = "A novel wide dynamic range (WDR) snapshot active pixel sensor for ultra-low power applications is presented. The proposed imager allows capturing of fast moving objects in the field of view and provides WDR by applying adaptive exposure time to each pixel, according to the local illumination intensity level. Driven by low-power dissipation requirements, the proposed pixel is operated by dual low voltage supplies (1.2 and 1.8 V) and utilizes an advanced low-power sensor design methodology. A test chip of a 32 * 32 array has been implemented in a standard 0.35-μm CMOS technology. A single pixel occupies 18 * 32 μm area and is expected to dissipate 18.5 nW at video rate. System architecture and operation are discussed and simulation results are presented.",

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Wide Dynamic Range Snapshot APS for Ultra Low-Power Applications

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