Voltage Level Detection for Near-<inline-formula> <tex-math notation="LaTeX">$V_{\mathrm{TH}}$</tex-math> </inline-formula> Computing

Asaf Feldman, Omer Nechushtan, Joseph Shor

Research output: Contribution to journalArticlepeer-review


Voltage level detectors (VLD) are used to monitor the supply voltage in integrated circuits (ICs) to determine when the system can initiate computation. The VLD must detect its own supply voltage, which is more challenging for low-voltage applications such as near-<inline-formula> <tex-math notation="LaTeX">$V_{\mathrm{TH}}$</tex-math> </inline-formula> computing (NVTC), which also requires low latency and rapid supply changes; furthermore, internal races in the VLD may cause false indications or glitches in the system and should be prevented by design. This work presents a glitch-free VLD that can detect supplies as low as 385 mV at a power of 217 nW and a measured latency of 10 <inline-formula> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>s. This was achieved by inserting a deterministic delay into one of the internal nodes, as well as low-voltage circuitry. The circuit is fabricated in a 65 nm CMOS process and occupies a footprint of 6900 <inline-formula> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m<inline-formula> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> with a measured temperature drift of 105 <inline-formula> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula>W/<inline-formula> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula>C and a sigma variation of 8 mV across 32 units. These characteristics make the circuit attractive for the near-threshold computing segment.

Original languageEnglish
Pages (from-to)1-11
Number of pages11
JournalIEEE Journal of Solid-State Circuits
StateAccepted/In press - 2023

Bibliographical note

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  • Batteries
  • Brown-out (BO) detector
  • CMOS
  • Delays
  • Detectors
  • Integrated circuits
  • Low latency communication
  • Low voltage
  • Monitoring
  • glitch free
  • low power
  • low voltage
  • near-<inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX">$V_{\mathrm{TH}}$</tex-math> </inline-formula> computing (NVTC)
  • power management (PM)
  • power-on-reset (POR)
  • voltage level detector (VLD)


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