Abstract
An adaptive FIR filter configuration which uses a ∑-∆ modulator as a front end is proposed for implementing the LMS algorithm in analogue form. The oversampled ∑-∆ modulator converts the filter input into a binary sequence, which can be readily delayed and multiplied with a shift register and on/off switching. Computer simulations show very good performance for such a hardware efficient configuration.
| Original language | English |
|---|---|
| Pages (from-to) | 751-753 |
| Number of pages | 3 |
| Journal | Electronics Letters |
| Volume | 28 |
| Issue number | 8 |
| DOIs | |
| State | Published - Apr 1992 |
| Externally published | Yes |
Keywords
- Adaptive filters
- Algorithms
- Filters
- Modulation
- Switched capacitor filters
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