Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach

Ramiro Taco; Esteban Garzón; Adam Teman; Leonid Yavits; Marco Lanuzza

doi:10.1109/iscas56072.2025.11043920

Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach

Ramiro Taco, Esteban Garzón, Adam Teman, Leonid Yavits, Marco Lanuzza

University of Calabria

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Low-Power high-performance content-addressable memories (CAMs) are important components in modern computing systems. In this work, we present a robust CAM that overcomes the power and performance limitations of conventional precharge-based CAMs. The proposed static transmission gate-based (STAT-TG) CAM design achieves low-power operation comparable to NAND CAMs while maintaining search speeds rivaling those of NOR CAMs. The STAT-TG CAM was designed using a 65nm CMOS technology and comprehensively evaluated under extensive Monte Carlo simulations. Compared to conventional CAMs, the STAT-TG CAM is 14% faster than NAND CAM, while consuming only 25% of the energy per operation relative to NOR CAM. This makes STAT-TG CAM a promising solution for high-performance yet energy-efficient applications.

Original language	English
Title of host publication	ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350356830
DOIs	https://doi.org/10.1109/iscas56072.2025.11043920
State	Published - 2025
Event	2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025 - London, United Kingdom Duration: 25 May 2025 → 28 May 2025

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025
Country/Territory	United Kingdom
City	London
Period	25/05/25 → 28/05/25

Bibliographical note

Publisher Copyright:
© 2025 IEEE.

Keywords

CAM
Content-Addressable Memory
Low-Power
NAND CAM
NOR CAM
Precharge-Free

Access to Document

10.1109/iscas56072.2025.11043920

Cite this

Taco, R., Garzón, E., Teman, A., Yavits, L., & Lanuzza, M. (2025). Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach. In ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/iscas56072.2025.11043920

@inproceedings{e68820d3b6df4e8aa82d08e34d27cd59,

title = "Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach",

abstract = "Low-Power high-performance content-addressable memories (CAMs) are important components in modern computing systems. In this work, we present a robust CAM that overcomes the power and performance limitations of conventional precharge-based CAMs. The proposed static transmission gate-based (STAT-TG) CAM design achieves low-power operation comparable to NAND CAMs while maintaining search speeds rivaling those of NOR CAMs. The STAT-TG CAM was designed using a 65nm CMOS technology and comprehensively evaluated under extensive Monte Carlo simulations. Compared to conventional CAMs, the STAT-TG CAM is 14\% faster than NAND CAM, while consuming only 25\% of the energy per operation relative to NOR CAM. This makes STAT-TG CAM a promising solution for high-performance yet energy-efficient applications.",

keywords = "CAM, Content-Addressable Memory, Low-Power, NAND CAM, NOR CAM, Precharge-Free",

author = "Ramiro Taco and Esteban Garz{\'o}n and Adam Teman and Leonid Yavits and Marco Lanuzza",

note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025 ; Conference date: 25-05-2025 Through 28-05-2025",

year = "2025",

doi = "10.1109/iscas56072.2025.11043920",

language = "אנגלית",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings",

address = "ארצות הברית",

}

Taco, R, Garzón, E, Teman, A , Yavits, L & Lanuzza, M 2025, Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach. in ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings. Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., 2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025, London, United Kingdom, 25/05/25. https://doi.org/10.1109/iscas56072.2025.11043920

Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach. / Taco, Ramiro; Garzón, Esteban; Teman, Adam et al.
ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2025. (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Towards Low-Power High-Performance Content-Addressable Memory

T2 - 2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025

AU - Taco, Ramiro

AU - Garzón, Esteban

AU - Teman, Adam

AU - Yavits, Leonid

AU - Lanuzza, Marco

PY - 2025

Y1 - 2025

N2 - Low-Power high-performance content-addressable memories (CAMs) are important components in modern computing systems. In this work, we present a robust CAM that overcomes the power and performance limitations of conventional precharge-based CAMs. The proposed static transmission gate-based (STAT-TG) CAM design achieves low-power operation comparable to NAND CAMs while maintaining search speeds rivaling those of NOR CAMs. The STAT-TG CAM was designed using a 65nm CMOS technology and comprehensively evaluated under extensive Monte Carlo simulations. Compared to conventional CAMs, the STAT-TG CAM is 14% faster than NAND CAM, while consuming only 25% of the energy per operation relative to NOR CAM. This makes STAT-TG CAM a promising solution for high-performance yet energy-efficient applications.

AB - Low-Power high-performance content-addressable memories (CAMs) are important components in modern computing systems. In this work, we present a robust CAM that overcomes the power and performance limitations of conventional precharge-based CAMs. The proposed static transmission gate-based (STAT-TG) CAM design achieves low-power operation comparable to NAND CAMs while maintaining search speeds rivaling those of NOR CAMs. The STAT-TG CAM was designed using a 65nm CMOS technology and comprehensively evaluated under extensive Monte Carlo simulations. Compared to conventional CAMs, the STAT-TG CAM is 14% faster than NAND CAM, while consuming only 25% of the energy per operation relative to NOR CAM. This makes STAT-TG CAM a promising solution for high-performance yet energy-efficient applications.

KW - CAM

KW - Content-Addressable Memory

KW - Low-Power

KW - NAND CAM

KW - NOR CAM

KW - Precharge-Free

UR - https://www.scopus.com/pages/publications/105010597744

U2 - 10.1109/iscas56072.2025.11043920

DO - 10.1109/iscas56072.2025.11043920

M3 - ???researchoutput.researchoutputtypes.contributiontobookanthology.conference???

AN - SCOPUS:105010597744

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 25 May 2025 through 28 May 2025

ER -

Taco R, Garzón E, Teman A , Yavits L, Lanuzza M. Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach. In ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2025. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/iscas56072.2025.11043920

Towards Low-Power High-Performance Content-Addressable Memory: A Robust Precharge-Free Approach

Abstract

Publication series

Conference

Bibliographical note

Keywords

Access to Document

Other files and links

Fingerprint

Cite this