Side channel analysis attacks are considered an extreme hardware security hazard for cryptographic devices. There are numerous approaches to prevent attackers from extracting useful information from secured devices. Nonetheless the cost of implementing an effective countermeasure is usually very high in terms of area/performance. In this paper we propose a novel approach to the temporal redistribution of the power information. Specifically, we present a circuit level methodology that makes it possible to manipulate the three main parameters of the current profile during the clock period: the start time of the computation, the duration and the amplitude. The effectiveness of the proposed countermeasure was evaluated on a 4-bit cryptographic function in a 65nm TSMC process. The simulation results indicate that the number of secret bits that leaked from the protected design (i.e., the mutual information) was reduced dramatically from 4 bits to 0.85 bits. In addition, at least 1500 ideal noise-free power traces were required to extract these bits, whereas less than 150 traces were required to extract the whole 4 bits from the unprotected design. The sensitivity of the protected circuit to process and environmental variations are minimal, with measured standard deviation of 0.1bit. The area overhead is up to 32%.
|Title of host publication||2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - 2020|
|Event||52nd IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Virtual, Online|
Duration: 10 Oct 2020 → 21 Oct 2020
|Name||Proceedings - IEEE International Symposium on Circuits and Systems|
|Conference||52nd IEEE International Symposium on Circuits and Systems, ISCAS 2020|
|Period||10/10/20 → 21/10/20|
Bibliographical noteFunding Information:
This work was supported by the Israel Science Foundation under Grants 1868/16 and 932/16.
© 2020 IEEE
- Hardware security
- Power analysis attacks
- Side channel analysis
- Temporal power redistribution