TamaRISC-CS: An ultra-low-power application-specific processor for compressed sensing

Jeremy Constantin, Ahmed Dogan, Oskar Andersson, Pascal Meinerzhagen, Joachim Neves Rodrigues, David Atienza, Andreas Burg

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

24 Scopus citations

Abstract

Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor.

Original languageEnglish
Title of host publication20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings
Pages159-164
Number of pages6
DOIs
StatePublished - 2012
Externally publishedYes
Event20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Santa Cruz, CA, United States
Duration: 7 Oct 201210 Oct 2012

Publication series

Name20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012 - Proceedings

Conference

Conference20th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012
Country/TerritoryUnited States
CitySanta Cruz, CA
Period7/10/1210/10/12

Funding

FundersFunder number
Seventh Framework Programme318013

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