Synthesis strategies for sub-VT systems

Pascal Meinerzhagen, Oskar Andersson, Yasser Sherazi, Andreas Burg, Joachim Rodrigues

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

Various synthesis strategies relying on conventional standard-cell libraries (SCLs) are evaluated in order to minimize the energy dissipation per operation in sub-threshold (sub-VT) systems. First, two sub-V T analysis methods are reviewed, both of which allow to evaluate the energy dissipation and performance in the sub-VT regime for designs which have been synthesized using a 65-nm CMOS SCL, characterized at nominal supply voltage. Both analysis methods are able to predict the energy minimum supply voltage (EMV) of any given design. Next, the results of a sub-V T synthesis at EMV using re-characterized SCLs are compared to the initial synthesis results. Finally, the results of timing-driven synthesis in both the above-VT and the sub-VT domain are compared to the results of power-driven synthesis.

Original languageEnglish
Title of host publication2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Pages552-555
Number of pages4
DOIs
StatePublished - 2011
Externally publishedYes
Event2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 - Linkoping, Sweden
Duration: 29 Aug 201131 Aug 2011

Publication series

Name2011 20th European Conference on Circuit Theory and Design, ECCTD 2011

Conference

Conference2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Country/TerritorySweden
CityLinkoping
Period29/08/1131/08/11

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