Switching architecture iterative optimization

A new method for implementing a general linear system using multi-stage architecture was recently published. In this method an iterative procedure determines the architecture to be used to simulate a linear system with a small number of stages and with a small error. Multi-stage IC (Inter-Connections) architectures allow easy switching between different channels. There are many known algorithms for optimizing the interconnection net in terms of minimizing the number of alterations required to switch from one set of channels to a similar set. In optics, however, there exists the problem of implementation. Not all the routing architectures can be easily constructed optically and there is an advantage in implementing routing architectures with a symmetric structure (e.g., perfect shuffle vs. the non-symmetric Banyan). Therefore an optical setup might be limited to the use of certain routing architectures. In a multi-stage IC architecture, the number of stages required for a wide sense non-blocking setup (i.e., all input channels can reach all output channels and switching two channels will affect only these channels, provided that a required switching algorithm is maintained) is known. Thus, the optimization that can be made refers to a specific set of input-output connections and results in finding the smallest number of routing stages required to achieve the full permutation set. In this work we present an algorithm for optimizing the routing scheme. We also show an algorithm for minimizing the number of changes required in a given routing scheme while shifting from one input-output connection to a similar connection.