Abstract
We consider the classical problem of sorting an input array containing n elements, where each element is described with a k-bit comparison key and a w-bit payload. A long-standing open problem is whether there exist (k+w) o(n log n)-sized Boolean circuits for sorting. A landmark result in this area is the work by Ajtai, Komlos, and Szemeredi (An O(n log n) sorting network, STOC'83), where they showed how to achieve sorting circuits with (k+w) O(n log n) Boolean gates. The recent work of Farhadi et al. (Lower bounds for external memory integer sorting via network coding, STOC'19) showed that if the famous Li-Li network coding conjecture is true, then sorting circuits of size w o(n log n) do not exist for general k; however, no unconditional lower bound is known (in fact proving superlinear circuit lower bounds in general is out of the reach of existing techniques). In this paper, we show that one can overcome the n log n barrier when the keys to be sorted are short. Specifically, we prove that there is a circuit with (k + w) O(nk) (log* n log* (w + k))2+ϵ Boolean gates capable of sorting any input array containing n elements, each described with a k-bit key and a w-bit payload. Therefore, if the keys to be sorted are short, say, k < o(log n), our result is asymptotically better than the classical Ajtai, Komlos, and Szemeredi sorting network (ignoring log* terms); and we also overcome the n log n barrier in such cases. Such a result might be surprising initially because it is long known that comparator-based techniques must incur Ω (n log n) comparator gates even when the keys to be sorted are only 1-bit long (e.g., see Knuth's "Art of Programming" textbook). To the best of our knowledge, we are the first to achieve nontrivial results for sorting circuits using non-comparison-based techniques.
Original language | English |
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Pages (from-to) | 424-466 |
Number of pages | 43 |
Journal | SIAM Journal on Computing |
Volume | 51 |
Issue number | 3 |
DOIs | |
State | Published - 2022 |
Bibliographical note
Publisher Copyright:© 2022 Society for Industrial and Applied Mathematics Publications. All rights reserved.
Funding
\ast Received by the editors November 17, 2020; accepted for publication (in revised form) November 24, 2021; published electronically May 5, 2022. A preliminary version of this paper appears in ACM-SIAM Symposium on Discrete Algorithms (SODA'21). https://doi.org/10.1137/20M1380983 Funding: This work is in part supported by an NSF CAREER Award under award CNS-1601879, a Packard Fellowship, an ONR YIP award, and a DARPA Brandeis award. The first author is sponsored by the Israel Science Foundation (grant 2439/20), and by the BIU Center for Research in Applied Cryptography and Cyber Security in conjunction with the Israel National Cyber Bureau in the Prime Minister's Office. This project has received funding from the European Union's Horizon 2020 research and innovation programme under the Marie Sklodowska-Curie grant agreement 891234.
Funders | Funder number |
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National Science Foundation | CNS-1601879 |
Office of Naval Research | |
Defense Advanced Research Projects Agency | |
Israel Science Foundation | 2439/20 |
Horizon 2020 | 891234 |
Keywords
- compaction
- selection
- sorting circuit