Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing

Yehuda Kra; Adam Teman

doi:10.1109/ISCAS48785.2022.9937508

Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing

Yehuda Kra
, Adam Teman

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

The vast majority of digital systems are designed using pipelined sequential logic, thanks to a well-known and robust implementation flow with the ability to increase throughput simply by introducing intermediate sampling stages. However, adding these registers results in significant area and power overheads. Clockless Wave-Propagated Pipelining (CWPP) is a design approach that reaches high throughputs without the need for intermediate sampling registers.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems, ISCAS 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1138-1139
Number of pages	2
ISBN (Electronic)	9781665484855
DOIs	https://doi.org/10.1109/ISCAS48785.2022.9937508
State	Published - 2022
Event	2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022 - Austin, United States Duration: 27 May 2022 → 1 Jun 2022

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2022-May
ISSN (Print)	0271-4310

Conference

Conference	2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022
Country/Territory	United States
City	Austin
Period	27/05/22 → 1/06/22

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

Access to Document

10.1109/ISCAS48785.2022.9937508

Cite this

Kra, Y., & Teman, A. (2022). Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing. In IEEE International Symposium on Circuits and Systems, ISCAS 2022 (pp. 1138-1139). (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2022-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS48785.2022.9937508

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abstract = "The vast majority of digital systems are designed using pipelined sequential logic, thanks to a well-known and robust implementation flow with the ability to increase throughput simply by introducing intermediate sampling stages. However, adding these registers results in significant area and power overheads. Clockless Wave-Propagated Pipelining (CWPP) is a design approach that reaches high throughputs without the need for intermediate sampling registers.",

author = "Yehuda Kra and Adam Teman",

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doi = "10.1109/ISCAS48785.2022.9937508",

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Kra, Y & Teman, A 2022, Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing. in IEEE International Symposium on Circuits and Systems, ISCAS 2022. Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2022-May, Institute of Electrical and Electronics Engineers Inc., pp. 1138-1139, 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, United States, 27/05/22. https://doi.org/10.1109/ISCAS48785.2022.9937508

Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing. / Kra, Yehuda; Teman, Adam.
IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 1138-1139 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2022-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing

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