SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD)

Ariel Pescovsky; Oron Chertkow; Lior Atias; Alexander Fish

doi:10.1109/s3s.2014.7028236

SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD)

Ariel Pescovsky, Oron Chertkow, Lior Atias, Alexander Fish

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Ben-Gurion University of the Negev

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

The pursuit of continuous scaling of electronic devices in the semiconductor industry has led to two unintended but significant outcomes: a rapid increase in susceptibility to radiation induced errors and an overall rise in power consumption. Operating under low voltage to reduce power only aggravates radiation related reliability issues. In this paper, a novel 'SEU Hardening Incorporating Extreme Low Power Bitcell Design' (SHIELD) is proposed to attend these two major concerns simultaneously. The SHIELD bitcell tolerates upsets with charge deposits over 1 pC when operated at a scaled 700mV supply voltage utilizing a 65nm process. Simulations confirm its advantages in terms of leakage power, with more than twofold lower leakage currents than previous solutions.

Original language	English
Title of host publication	2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479974382
DOIs	https://doi.org/10.1109/s3s.2014.7028236
State	Published - 30 Jan 2014
Event	2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014 - Millbrae, United States Duration: 6 Oct 2014 → 9 Oct 2014

Publication series

Name	2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014

Conference

Conference	2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014
Country/Territory	United States
City	Millbrae
Period	6/10/14 → 9/10/14

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

Access to Document

10.1109/s3s.2014.7028236

Cite this

Pescovsky, A., Chertkow, O., Atias, L., & Fish, A. (2014). SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD). In 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014 Article 7028236 (2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/s3s.2014.7028236

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Pescovsky, A, Chertkow, O, Atias, L & Fish, A 2014, SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD). in 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014., 7028236, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014, Institute of Electrical and Electronics Engineers Inc., 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014, Millbrae, United States, 6/10/14. https://doi.org/10.1109/s3s.2014.7028236

SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD). / Pescovsky, Ariel; Chertkow, Oron; Atias, Lior et al.
2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 7028236 (2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Pescovsky A, Chertkow O, Atias L, Fish A. SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD). In 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 7028236. (2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014). doi: 10.1109/s3s.2014.7028236

SEU Hardening: Incorporating an Extreme Low Power Bitcell Design (SHIELD)

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