Recovery of Distributed Iterative Solvers for Linear Systems Using Non-Volatile RAM

Yehonatan Fridman, Yaniv Snir, Harel Levin, Danny Hendler, Hagit Attiya, Gal Oren

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

HPC systems are a critical resource for scientific research and advanced industries. The increased demand for computational power and memory ushers in the exascale era, in which supercomputers are designed to provide enormous computing power to meet these needs. These complex supercomputers consist of numerous compute nodes and are consequently expected to experience frequent faults and crashes. Mathematical solvers, in particular, iterative linear solvers are key building block in numerous large-scale scientific applications. Consequently, supporting the recovery of distributed solvers is necessary for scaling scientific applications to exascale platforms. Previous recovery methods for iterative solvers are based on Checkpoint-Restart (CR), which incurs high fault tolerance overhead, or intrinsic fault tolerance, which require extra computation time to converge after failures. Exact state reconstruction (ESR) was proposed as an alternative mechanism to alleviate the impact of frequent failures on long-term computations. ESR has been shown to provide exact reconstruction of the computation state while avoiding the need for costly checkpointing. However, ESR currently relies on volatile memory for fault tolerance, and must therefore maintain redundancies in the RAM of multiple nodes. This not only incurs high memory overhead but also prevents ESR from being fully resilient, that is, resilient against a full system crash. Recent supercomputer designs feature emerging non-volatile RAM (NVRAM) technology, for example, the exascale Aurora that is planned to consist of Intel Optane™ DCPMM. This paper investigates how NVRAM can be utilized to devise an enhanced ESR-based recovery mechanism that is more efficient and provides full resilience. Our mechanism, called in-NVRAM ESR, provides full resiliency while significantly reducing both the memory footprint and the time overhead in comparison with the original ESR design (in-RAM ESR). In-NVRAM ESR is based on a novel MPI One-Sided Communication (OSC) over RDMA implementation, which was optimized and applied for using NVRAM to store recovery data for iterative linear solvers.

Original languageEnglish
Title of host publicationProceedings of FTXS 2022
Subtitle of host publicationWorkshop on Fault Tolerance for HPC at eXtreme Scale, Held in conjunction with SC 2022: The International Conference for High Performance Computing, Networking, Storage and Analysis
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages11-23
Number of pages13
ISBN (Electronic)9781665488471
DOIs
StatePublished - 2022
Externally publishedYes
Event12th IEEE/ACM Workshop on Fault Tolerance for HPC at eXtreme Scale, FTXS 2022 - Dallas, United States
Duration: 13 Nov 202218 Nov 2022

Publication series

NameProceedings of FTXS 2022: Workshop on Fault Tolerance for HPC at eXtreme Scale, Held in conjunction with SC 2022: The International Conference for High Performance Computing, Networking, Storage and Analysis

Conference

Conference12th IEEE/ACM Workshop on Fault Tolerance for HPC at eXtreme Scale, FTXS 2022
Country/TerritoryUnited States
CityDallas
Period13/11/2218/11/22

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

Funding

This work was supported by Pazy grant 226/20, ISF grant 1425/22, the Lynn and William Frankel Center for Computer Science, and Intel Corporation (oneAPI Center of Excellence program). Computational support was provided by the NegevHPC project [79]. The authors would like to thank Gabi Dadush, Israel Hen and Emil Malka for their hardware support This work was supported by Pazy grant 226/20, ISF grant 1425/22, the Lynn and William Frankel Center for Computer Science, and Intel Corporation (oneAPI Center of Excellence program). Computational support was provided by the NegevHPC project [79]. The authors would like to thank Gabi Dadush,IsraelHenandEmilMalkafortheirhardwaresupport.

FundersFunder number
Gabi Dadush, Israel Hen and Emil Malka
Lynn and William Frankel Center for Computer Science
Intel Corporation
Israel Science Foundation1425/22

    Keywords

    • ESR
    • Exascale
    • HPC
    • Intel Optane DCPMM
    • Iterative Solvers
    • MPI OSC
    • NVRAM
    • PCG
    • RDMA
    • Recovery

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