Protecting cryptographic hardware against malicious attacks by nonlinear robust codes

Victor Tomashevich; Yaara Neumeier; Raghavan Kumar; Osnat Keren; Ilia Polian

doi:10.1109/dft.2014.6962084

Protecting cryptographic hardware against malicious attacks by nonlinear robust codes

Victor Tomashevich
, Yaara Neumeier
, Raghavan Kumar
, Osnat Keren
, Ilia Polian

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

20 Scopus citations

Abstract

Fault-based attacks against cryptographic circuits must be addressed by techniques that are different from approaches designed for random transient faults. We systematically investigate robust error-detecting codes that specifically target malicious attacks and guarantee minimal bounds on detection probability. Our study is based on FPGA-supported fault-injection campaigns on the circuit implementation of a recent lightweight block cipher and its sub-modules. We quantify the detection capabilities of different robust and non-robust codes with respect to both random faults and malicious attacks, as well as the required overheads. For the first time, we report performance of a novel punctured cubic code on actual cryptographic circuitry. Experimental results show that robust codes with a certain number of redundant bits have better detection properties in security context and higher predictability than their conventional linear counterparts.

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	40-45
Number of pages	6
ISBN (Electronic)	9781479961559
DOIs	https://doi.org/10.1109/dft.2014.6962084
State	Published - 18 Nov 2014
Event	27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014 - Amsterdam, Netherlands Duration: 1 Oct 2014 → 3 Oct 2014

Publication series

Name	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
ISSN (Print)	1550-5774

Conference

Conference	27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014
Country/Territory	Netherlands
City	Amsterdam
Period	1/10/14 → 3/10/14

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

Access to Document

10.1109/dft.2014.6962084

Cite this

Tomashevich, V., Neumeier, Y., Kumar, R., Keren, O., & Polian, I. (2014). Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. In Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (pp. 40-45). Article 6962084 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/dft.2014.6962084

Tomashevich, Victor ; Neumeier, Yaara ; Kumar, Raghavan et al. / Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 40-45 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems).

@inproceedings{f03203989e9f41e38489059e44f023f3,

title = "Protecting cryptographic hardware against malicious attacks by nonlinear robust codes",

abstract = "Fault-based attacks against cryptographic circuits must be addressed by techniques that are different from approaches designed for random transient faults. We systematically investigate robust error-detecting codes that specifically target malicious attacks and guarantee minimal bounds on detection probability. Our study is based on FPGA-supported fault-injection campaigns on the circuit implementation of a recent lightweight block cipher and its sub-modules. We quantify the detection capabilities of different robust and non-robust codes with respect to both random faults and malicious attacks, as well as the required overheads. For the first time, we report performance of a novel punctured cubic code on actual cryptographic circuitry. Experimental results show that robust codes with a certain number of redundant bits have better detection properties in security context and higher predictability than their conventional linear counterparts.",

author = "Victor Tomashevich and Yaara Neumeier and Raghavan Kumar and Osnat Keren and Ilia Polian",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014 ; Conference date: 01-10-2014 Through 03-10-2014",

year = "2014",

month = nov,

day = "18",

doi = "10.1109/dft.2014.6962084",

language = "אנגלית",

series = "Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "40--45",

booktitle = "Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",

address = "ארצות הברית",

}

Tomashevich, V, Neumeier, Y, Kumar, R, Keren, O & Polian, I 2014, Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems., 6962084, Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Institute of Electrical and Electronics Engineers Inc., pp. 40-45, 27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, Netherlands, 1/10/14. https://doi.org/10.1109/dft.2014.6962084

Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. / Tomashevich, Victor; Neumeier, Yaara; Kumar, Raghavan et al.
Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Institute of Electrical and Electronics Engineers Inc., 2014. p. 40-45 6962084 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Protecting cryptographic hardware against malicious attacks by nonlinear robust codes

AU - Tomashevich, Victor

AU - Neumeier, Yaara

AU - Kumar, Raghavan

AU - Keren, Osnat

AU - Polian, Ilia

PY - 2014/11/18

Y1 - 2014/11/18

N2 - Fault-based attacks against cryptographic circuits must be addressed by techniques that are different from approaches designed for random transient faults. We systematically investigate robust error-detecting codes that specifically target malicious attacks and guarantee minimal bounds on detection probability. Our study is based on FPGA-supported fault-injection campaigns on the circuit implementation of a recent lightweight block cipher and its sub-modules. We quantify the detection capabilities of different robust and non-robust codes with respect to both random faults and malicious attacks, as well as the required overheads. For the first time, we report performance of a novel punctured cubic code on actual cryptographic circuitry. Experimental results show that robust codes with a certain number of redundant bits have better detection properties in security context and higher predictability than their conventional linear counterparts.

AB - Fault-based attacks against cryptographic circuits must be addressed by techniques that are different from approaches designed for random transient faults. We systematically investigate robust error-detecting codes that specifically target malicious attacks and guarantee minimal bounds on detection probability. Our study is based on FPGA-supported fault-injection campaigns on the circuit implementation of a recent lightweight block cipher and its sub-modules. We quantify the detection capabilities of different robust and non-robust codes with respect to both random faults and malicious attacks, as well as the required overheads. For the first time, we report performance of a novel punctured cubic code on actual cryptographic circuitry. Experimental results show that robust codes with a certain number of redundant bits have better detection properties in security context and higher predictability than their conventional linear counterparts.

UR - https://www.scopus.com/pages/publications/84914674593

U2 - 10.1109/dft.2014.6962084

DO - 10.1109/dft.2014.6962084

M3 - ???researchoutput.researchoutputtypes.contributiontobookanthology.conference???

AN - SCOPUS:84914674593

T3 - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

SP - 40

EP - 45

BT - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014

Y2 - 1 October 2014 through 3 October 2014

ER -

Tomashevich V, Neumeier Y, Kumar R, Keren O, Polian I. Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. In Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Institute of Electrical and Electronics Engineers Inc. 2014. p. 40-45. 6962084. (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems). doi: 10.1109/dft.2014.6962084

Protecting cryptographic hardware against malicious attacks by nonlinear robust codes

Abstract

Publication series

Conference

Bibliographical note

Access to Document

Other files and links

Fingerprint

Cite this