Process variation-aware datapath employing dual mode logic

Keyphrases

• Process Variation 100%
• Dual Mode Logic 100%
• Variation-aware 100%
• Dynamic Mode 60%
• Static Mode 40%
• Energy Saving 40%
• Performance Requirements 20%
• High Energy 20%
• Self-adaptive 20%
• Energy Consumption 20%
• Logic Design 20%
• Logic-based 20%
• 64-bit 20%
• Number of Gates 20%
• Low Power Consumption 20%
• Ripple Carry Adder 20%
• Digital Logic Gates 20%
• High Delays 20%
• Design Sensitivity 20%
• Near-threshold Voltage 20%
• Silicon Phase 20%
• Optimal Configuration 20%
• NOR Gate 20%
• Mixed-mode Operation 20%
• Architectural Level 20%
• Post-silicon 20%
• High Performance Mode 20%
• Process Corners 20%

Engineering

• Energy Engineering 100%
• Process Variation 100%
• Mode Dynamic 100%
• Logic Design 33%
• Adders 33%
• Proof-of-Concept 33%
• Digital Gate 33%
• Mode Operation 33%
• Mixed Mode 33%
• Performance Requirement 33%
• Critical Path 33%
• Architectural Level 33%

Material Science

• Silicon 100%