POLES, ZEROS AND THEIR SENSITIVITIES IN SWITCHED-CAPACITOR NETWORKS.

R. Plodeck; J. Vlach; G. S. Moschytz

POLES, ZEROS AND THEIR SENSITIVITIES IN SWITCHED-CAPACITOR NETWORKS.

R. Plodeck
, J. Vlach
, G. S. Moschytz

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Original language	English
Title of host publication	Circuit Theory and Design, Proceedings of the European Conference
Publisher	VDE-Verlag
Pages	306-311
Number of pages	6
ISBN (Print)	3800713276
State	Published - 1983

Publication series

Name	Circuit Theory and Design, Proceedings of the European Conference

Cite this

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title = "POLES, ZEROS AND THEIR SENSITIVITIES IN SWITCHED-CAPACITOR NETWORKS.",

author = "R. Plodeck and J. Vlach and Moschytz, \{G. S.\}",

year = "1983",

language = "אנגלית",

isbn = "3800713276",

series = "Circuit Theory and Design, Proceedings of the European Conference",

publisher = "VDE-Verlag",

pages = "306--311",

booktitle = "Circuit Theory and Design, Proceedings of the European Conference",

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POLES, ZEROS AND THEIR SENSITIVITIES IN SWITCHED-CAPACITOR NETWORKS. / Plodeck, R.; Vlach, J.; Moschytz, G. S.
Circuit Theory and Design, Proceedings of the European Conference. VDE-Verlag, 1983. p. 306-311 (Circuit Theory and Design, Proceedings of the European Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Vlach, J.

AU - Moschytz, G. S.

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AN - SCOPUS:0021005357

SN - 3800713276

T3 - Circuit Theory and Design, Proceedings of the European Conference

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EP - 311

BT - Circuit Theory and Design, Proceedings of the European Conference

PB - VDE-Verlag

ER -

POLES, ZEROS AND THEIR SENSITIVITIES IN SWITCHED-CAPACITOR NETWORKS.

Publication series

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