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Planar CMOS to multi-gate layout conversion for maximal fin utilization
Shmuel Wimer
Bar-Ilan University - The Alexander Kofkin Faculty of Engineering
Technion-Israel Institute of Technology
Research output
:
Contribution to journal
›
Article
›
peer-review
4
Scopus citations
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Keyphrases
Multi-gate
100%
Planar CMOS
100%
Multigate Transistor
100%
Intel
50%
Cell Library
50%
Hard IP
50%
IP Reuse
50%
New Targets
25%
Polygon
25%
Cellular Level
25%
Transistor Layout
25%
Fin Field-effect Transistor (FinFET)
25%
Marketing Strategy
25%
Functional Block
25%
Interface Compatibility
25%
Moore's Law
25%
Product Generations
25%
Bulk Diffusion
25%
Robust Transformations
25%
22 Nm Node
25%
14 Nm Node
25%
Discrete Optimization Algorithm
25%
Tri-gate
25%
Planar Transistor
25%
Computer Science
Key Requirement
100%
Discrete Optimization
100%
Moore's Law
100%
Functional Block
100%
Target Technology
100%
Optimization Algorithm
100%