One of the main problems in implementing analog FIR filters is the requirement of many accurate analog delay elements. A long line of analog delay elements accumulates noise, offset, supply coupled noise and clock feedthrough and consumes large area and power. It can be replaced by a simple binary shift register if the analog input is first coded by a Σ-Δ modulator into a binary string. Doing so saves area, reduces circuit complexity and makes the signal immune to delay element imperfections. The high frequency quantization noise produced by the Σ-Δ modulator is removed by the lowpass or bandpass FIR filter being implemented. The price paid for these advantages is that the clock rate in the proposed oversampled FIR structure is about a factor of four to five times higher than conventional SC circuits for similar signal bandwidths.
|Number of pages||4|
|State||Published - 1991|
|Event||China 1991 International Conference on Circuits and Systems. Part 2 (of 2) - Shenzhen, China|
Duration: 16 Jun 1991 → 17 Jun 1991
|Conference||China 1991 International Conference on Circuits and Systems. Part 2 (of 2)|
|Period||16/06/91 → 17/06/91|