OCCAM: An Error Oblivious CAM

Yuval Harary, Paz Snapir, Eyal Reshef, Esteban Garzon, Leonid Yavits

Research output: Contribution to journalArticlepeer-review


Content addressable memories (CAMs) are widely used in many applications in general purpose computer microarchitecture, networking and domain-specific hardware accelerators. In addition to storing and reading data, CAMs enable simultaneous compare of query datawords with the entire memory content. Similar to SRAM and DRAM, CAMs are prone to errors and faults. While error correcting codes (ECCs) are widely used in DRAM and SRAM, they are not directly applicable in CAM: if a dataword that is supposed to match a query altered due to an error, it will falsely mismatch even if it is ECC-encoded. We propose OCCAM, an error oblivious CAM, which combines ECC and approximate search (matching) to allow tolerating a large and dynamically configurable number of errors. We manufactured the OCCAM silicon prototype using 65-nm commercial process and verified its error tolerance capabilities through silicon measurements. OCCAM tolerates 11% error rate (7 bit errors in each 64-bit memory row) with 100% sensitivity and specificity.

Original languageEnglish
Pages (from-to)82-85
Number of pages4
JournalIEEE Solid-State Circuits Letters
StatePublished - 2024

Bibliographical note

Publisher Copyright:
© 2018 IEEE.


  • Content addressable memory (CAM)
  • Hamming distance (HD)
  • error correcting codes (ECCs)
  • error tolerance


Dive into the research topics of 'OCCAM: An Error Oblivious CAM'. Together they form a unique fingerprint.

Cite this