Abstract
A new design technique is described for parasitic-insensitive switched-capacitor ladder filters. The proposed scheme is based on discrete-time signal-flow-graph techniques. The resulting networks exhibit low sensitivity with respect to element-value variations.
Original language | English |
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Pages (from-to) | 276-278 |
Number of pages | 3 |
Journal | Electronics Letters |
Volume | 18 |
Issue number | 6 |
DOIs | |
State | Published - 18 Mar 1982 |
Externally published | Yes |
Keywords
- Bilinear z-transform
- Filters
- Switched-capacitor networks