Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations

Esteban Garzon, Alessandro Bedoya, Marco Lanuzza, Leonid Yavits

Research output: Contribution to journalArticlepeer-review

Abstract

This article presents a monolithic 3-D associative in-memory processor (M3D AP) that combines emerging nonvolatile (NV) magnetic tunnel junction (MTJ) technology with massively parallel associative in-memory processing and M3D integration. The proposed architecture features two monolithic layers, with CMOS logic in the first layer and an MTJ-based content-addressable memory (CAM) array in the second layer. We conduct a thorough analysis of the electrical characteristics of the MTJ-based AP and use analysis results to evaluate the performance and power consumption of the M3D AP. We build a custom cycle-accurate simulator to implement and evaluate the 3-D associative matrix multiplication algorithm, highlighting the potential of the M3D AP for accelerating artificial intelligence applications. Overall, we demonstrate the efficacy of M3D AP and show that it holds promise for high-performance and energy-efficient in-memory computing.

Original languageEnglish
Pages (from-to)40-48
Number of pages9
JournalIEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Volume10
DOIs
StatePublished - 2024

Bibliographical note

Publisher Copyright:
© 2024 The Authors.

Keywords

  • 3-D integration
  • associative processor
  • content-addressable memory (CAM)
  • data-intensive applications
  • monolithic 3-D (M3D)
  • nonvolatile (NV) CAM

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