Mixed analog-digital realization of the LMS algorithm using sigma-delta modulators

D. Mueller, A. Kaelin, G. S. Moschytz

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

A multiplier-less mixed analog-digital (mixed-mode) realization of the LMS algorithm is proposed for use in linearly adaptive - recursive and non-recursive - switched-capacitor state-space filters. Analog and digital Σ-Δ modulators are used to perform the required multiplications. Digital circuitry is used to prevent the offset problems that occur in conventional analog LMS realizations. Having analog input signals, our realization provides a digital output for further processing. The dependence of the performance on the accuracy of the mixed-mode multipliers is investigated. It is shown theoretically, and by means of simulations, that the multipliers used to weight the state signals are the performance limiting elements. Nevertheless, we show that low-pass filtering of the state signals can increase the adaptation accuracy by 15 dB per doubling of the oversampling ratio - if second-order modulators are used. Using an oversampled clock rate for the modulators, which is eight times larger than the clock rate of the SC filter, our realization of the LMS algorithm can estimate the filter weights with an accuracy equivalent to 11-bits.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Pages882-885
Number of pages4
StatePublished - 1993
Externally publishedYes
Event1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: 3 May 19936 May 1993

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Conference

Conference1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period3/05/936/05/93

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