Abstract
Neural networks have become indispensable for a wide range of applications, but they suffer from high computationaland memory-requirements, requiring optimizations from the algorithmic description of the network to the hardware implementation. Moreover, the high rate of innovation in machine learning makes it important that hardware implementations provide a high level of programmability to support current and future requirements of neural networks. In this work, we present a flexible hardware accelerator for neural networks, called Lupulus, supporting various methods for scheduling and mapping of operations onto the accelerator. Lupulus was implemented in a 28nm FD-SOI technology and demonstrates a peak performance of 380GOPS/GHz with latencies of 21.4ms and 183.6ms for the convolutional layers of AlexNet and VGG-16, respectively.
| Original language | English |
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| Title of host publication | 2020 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2020 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 1608-1612 |
| Number of pages | 5 |
| ISBN (Electronic) | 9781509066315 |
| DOIs | |
| State | Published - May 2020 |
| Externally published | Yes |
| Event | 2020 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2020 - Barcelona, Spain Duration: 4 May 2020 → 8 May 2020 |
Publication series
| Name | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings |
|---|---|
| Volume | 2020-May |
| ISSN (Print) | 1520-6149 |
Conference
| Conference | 2020 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2020 |
|---|---|
| Country/Territory | Spain |
| City | Barcelona |
| Period | 4/05/20 → 8/05/20 |
Bibliographical note
Publisher Copyright:© 2020 IEEE.