Low-power "smart" CMOS image sensors

Fast development of low-power miniature CMOS sensors triggers their penetration to various applications, such as bio-medical applications, digital still and video cameras, cellular phones, web and security cameras and many other applications. The advantages of CMOS imagers over conventional CCD sensors are the possibility in integration of all functions required for timing, exposure control, color processing, image enhancement, image compression, analog-to-digital (ADC) conversion on the same chip and low-power operation. However, although CMOS imagers naturally provide low-power dissipation, their wide utilization in various portable battery-operated devices generates an increased demand for more aggressive power reduction. This paper presents a "smart" image sensor architecture and reviews general considerations for power reduction in CMOS image sensors at all possible design levels - technology, device, circuit, logic, architecture, algorithm and system integration.