Abstract
IoT devices often face conflicting power and performance requirements. They might be required to dynamically switch between (1) power-saving battery-powered mode, (2) ultra-low harvested power mode, and (3) high-performance real-time operation. In this work, we present a novel Triple Mode Logic (TML) that addresses the aforementioned requirements and enables ultra-low power mode for purely harvested operation, energy-saving mode for battery-powered operation, and accelerated mode for high-performance operation. Simulation results of several TML benchmarks indicate that in ultra-low power mode, TML reduces the power consumption by approximately five orders of magnitude compared to CMOS. In normal static (energy-saving) mode, TML consumes up to 35% less energy than Dual Mode Standard Cell (DMSC) state-of-the-art solution. In normal dynamic (high-performance) mode, TML is faster than the DMSC solution by up to 43%.
| Original language | English |
|---|---|
| Title of host publication | 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9798350386301 |
| DOIs | |
| State | Published - 2024 |
| Event | 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024 - Larnaca, Cyprus Duration: 9 Jun 2024 → 12 Jun 2024 |
Publication series
| Name | 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024 |
|---|
Conference
| Conference | 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024 |
|---|---|
| Country/Territory | Cyprus |
| City | Larnaca |
| Period | 9/06/24 → 12/06/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
Keywords
- Dual Mode Logic (DML)
- Dual Mode Standard Cell (DMSC)
- Dynamic Leakage-Suppression (DLS) logic
- IoT
- Leakage Suppression Mode (LSM)
- Triple Mode Logic (TML)
- logic gates
- low power
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