Low Noise Voltage Regulator Circuits for Low-Jitter PLL's

Original language	American English
Title of host publication	International Circuit Technology Conference
State	Published - 2008

Bibliographical note

Place of conference:USA

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Shor, J. (2008). Low Noise Voltage Regulator Circuits for Low-Jitter PLL's. In International Circuit Technology Conference

Shor, J. / Low Noise Voltage Regulator Circuits for Low-Jitter PLL's. International Circuit Technology Conference. 2008.

@inproceedings{6cd8d0f68244474592b1eedb0586213c,

title = "Low Noise Voltage Regulator Circuits for Low-Jitter PLL's",

author = "J. Shor",

note = "Place of conference:USA",

year = "2008",

language = "American English",

booktitle = "International Circuit Technology Conference",

}

Shor, J 2008, Low Noise Voltage Regulator Circuits for Low-Jitter PLL's. in International Circuit Technology Conference.

Low Noise Voltage Regulator Circuits for Low-Jitter PLL's. / Shor, J.
International Circuit Technology Conference. 2008.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Low Noise Voltage Regulator Circuits for Low-Jitter PLL's

AU - Shor, J.

N1 - Place of conference:USA

PY - 2008

Y1 - 2008

M3 - Conference contribution

BT - International Circuit Technology Conference

ER -

Shor J. Low Noise Voltage Regulator Circuits for Low-Jitter PLL's. In International Circuit Technology Conference. 2008