Abstract
This demo demonstrates the unique capabilities of the multimode Dual Mode Logic (DML) design technique to define run-time adaptive datapaths to overcome process and environmental (i.e., temperature and voltage) variations. A proof-of concept benchmark circuit is designed and fabricated in 65 nm technology. Measurements on 10 test chips, while considering supply voltages spanning 0.6V to 1.2V and temperature variations ranging from − 40 ° C to 125 ° C confirmed the effectiveness of the proposed approach to compensate even for severe process, voltage and temperature (PVT) variations.
| Original language | English |
|---|---|
| Title of host publication | 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781728192017 |
| DOIs | |
| State | Published - 2021 |
| Event | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of Duration: 22 May 2021 → 28 May 2021 |
Publication series
| Name | Proceedings - IEEE International Symposium on Circuits and Systems |
|---|---|
| Volume | 2021-May |
| ISSN (Print) | 0271-4310 |
Conference
| Conference | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 |
|---|---|
| Country/Territory | Korea, Republic of |
| City | Daegu |
| Period | 22/05/21 → 28/05/21 |
Bibliographical note
Publisher Copyright:© 2021 IEEE
Funding
IV. ACKNOWLEDGMENT This demo was supported by the Israel Innovation Authority in the frame of the GenPro consortium and the Israel Ministry of Science & technology under Grant 3-14361 and the Golda Meir scholarship.
| Funders | Funder number |
|---|---|
| Israel Innovation Authority | |
| Ministry of science and technology, Israel | 3-14361 |