Interconnect Power and Delay Optimization by Dynamic Programming in Gridded Design Rules

Keyphrases

• Dynamic Programming Algorithm 100%
• Dynamic Programming 100%
• Process Technology 100%
• Interconnect Delay 100%
• Gridded Design Rules 100%
• Power Optimization 100%
• Interconnect Power 100%
• Delay Optimization 100%
• Lithography 50%
• Small Sets 50%
• Interdependency 50%
• Power Delay Profile 50%
• Bus Structure 50%
• Power Delay Product 50%
• Optimal Power 50%
• Post-layout 50%
• Bundle Structure 50%
• Layout Optimization 50%
• Total Delay 50%
• Global Optimum 50%
• Nanometer Process 50%
• Energy-delay Tradeoff 50%
• Variable Optimization 50%
• Delay Reduction 50%
• Microprocessor 50%
• Total Power 50%
• Trade-off Curve 50%
• Dynamic Power 50%
• Fixed-length 50%
• Optimization Methods 50%
• Weighted Sums 50%

Engineering

• Design Rule 100%
• Interconnects 100%
• Dynamic Programming 100%
• Nanometre 28%
• Continuous Variable 14%
• Discrete Value 14%
• Layout Optimization 14%
• Global Optimum 14%
• Lithography 14%
• Microprocessor 14%
• Interdependency 14%
• Optimization Technique 14%
• optimal power 14%

Computer Science

• Dynamic Programming 100%
• Dynamic Programming Algorithm 100%
• Optimization Technique 50%
• Dynamic Power 50%
• Interdependency 50%
• Continuous Variable 50%
• Microprocessor 50%