Integrated Switched-Capacitor Low-Pass Filter with Combined Anti-Aliasing Decimation Filter for Low Frequencies

Daniel C. von Grunigen; Rainer Sigg; Michael Ludwig; Urs W. Brugger; George S. Moschytz; Hans Melchior

doi:10.1109/JSSC.1982.1051856

Integrated Switched-Capacitor Low-Pass Filter with Combined Anti-Aliasing Decimation Filter for Low Frequencies

Daniel C. von Grunigen
, Rainer Sigg
, Michael Ludwig
, Urs W. Brugger
, George S. Moschytz
, Hans Melchior

Swiss Federal Institute of Technology Zurich
Zurich Insurance Company
School of Engineering

Research output: Contribution to journal › Article › peer-review

19 Scopus citations

Abstract

A new combined anti-aliasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic range of 84 dB. The decimation filter converts the input clock of 16 kHz into an output clock of 250 Hz. The integrated anti-aliasing filter has a low pole frequency of about 3 kHz.

Original language	English
Pages (from-to)	1024-1029
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	17
Issue number	6
DOIs	https://doi.org/10.1109/JSSC.1982.1051856
State	Published - Dec 1982
Externally published	Yes

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10.1109/JSSC.1982.1051856

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title = "Integrated Switched-Capacitor Low-Pass Filter with Combined Anti-Aliasing Decimation Filter for Low Frequencies",

abstract = "A new combined anti-aliasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic range of 84 dB. The decimation filter converts the input clock of 16 kHz into an output clock of 250 Hz. The integrated anti-aliasing filter has a low pole frequency of about 3 kHz.",

author = "\{von Grunigen\}, \{Daniel C.\} and Rainer Sigg and Michael Ludwig and Brugger, \{Urs W.\} and Moschytz, \{George S.\} and Hans Melchior",

year = "1982",

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doi = "10.1109/JSSC.1982.1051856",

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AU - Ludwig, Michael

AU - Brugger, Urs W.

AU - Moschytz, George S.

AU - Melchior, Hans

PY - 1982/12

Y1 - 1982/12

N2 - A new combined anti-aliasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic range of 84 dB. The decimation filter converts the input clock of 16 kHz into an output clock of 250 Hz. The integrated anti-aliasing filter has a low pole frequency of about 3 kHz.

AB - A new combined anti-aliasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic range of 84 dB. The decimation filter converts the input clock of 16 kHz into an output clock of 250 Hz. The integrated anti-aliasing filter has a low pole frequency of about 3 kHz.

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ER -

Integrated Switched-Capacitor Low-Pass Filter with Combined Anti-Aliasing Decimation Filter for Low Frequencies

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