TY - GEN
T1 - Improving speed and power characteristics of pulse-triggered flip-flops
AU - Lanuzza, Marco
AU - Taco, Ramiro
PY - 2014
Y1 - 2014
N2 - This paper presents a simple circuital technique to design efficient pulse triggered flip-flops. The proposed approach aims at considerably alleviating the detrimental effects of current contention mechanisms, occurring at critical switching nodes during an output switching. In this way, both latency and power consumption are reduced. The proposed approach is assessed by means of simulations in 90-nm ST commercial CMOS technology. When applied to some recently proposed implicit pulse triggered flip-flop architectures, the suggested design strategy, allows speed to be improved up to 13% and power-delay-product to be lowered down to 14%. Moreover, also the process variation tolerance is considerably improved.
AB - This paper presents a simple circuital technique to design efficient pulse triggered flip-flops. The proposed approach aims at considerably alleviating the detrimental effects of current contention mechanisms, occurring at critical switching nodes during an output switching. In this way, both latency and power consumption are reduced. The proposed approach is assessed by means of simulations in 90-nm ST commercial CMOS technology. When applied to some recently proposed implicit pulse triggered flip-flop architectures, the suggested design strategy, allows speed to be improved up to 13% and power-delay-product to be lowered down to 14%. Moreover, also the process variation tolerance is considerably improved.
UR - http://www.scopus.com/inward/record.url?scp=84904577656&partnerID=8YFLogxK
U2 - 10.1109/lascas.2014.6820287
DO - 10.1109/lascas.2014.6820287
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AN - SCOPUS:84904577656
SN - 9781479925070
T3 - 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings
BT - 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings
PB - IEEE Computer Society
T2 - 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014
Y2 - 25 February 2014 through 28 February 2014
ER -