High speed and high resolution current Loser-take-all circuit of o (N) complexity

A. Fish, Vadim Milrud, Orly Yadid-Pecht

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A CMOS high performance current mode loser-take-all (LTA) circuit is presented. Based on an input currents average computation method, the circuit employs inhibitory and excitatory feedbacks, achieving both high speed and high resolution. The proposed circuit is suitable for operation in a wide variety of applications, such as self organizing neural networks and fuzzy systems, and it also can be used to compute the global minimum of the input array. While having a very simple structure, the proposed LTA has an O(N) complexity and is easy to implement. A circuit having 8 cells was designed and simulated in a standard 0.35 μm CMOS process available through MOSIS, is operated via a 1.8 V supply and dissipates 58 μW of power per cell. Its operation is discussed and simulation results are reported.
Original languageAmerican English
Title of host publicationElectronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on
PublisherIEEE
StatePublished - 2004

Bibliographical note

Place of conference:Israel

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