TY - GEN
T1 - High speed and high resolution current loser-take-all circuit of O(N) complexity
AU - Fish, Alexander
AU - Milrud, Vadim
AU - Yadid-Pecht, Orly
PY - 2004
Y1 - 2004
N2 - A CMOS high performance current mode loser-take-all (LTA) circuit is presented. Based on input currents average computation method, the circuit employs inhibitory and excitatory feedbacks, achieving both high speed and high resolution. The proposed circuit is suitable for operation in a wide variety of applications, such as self organizing neural networks, fuzzy systems and it also can be used to compute the global minimum of the input array. While having very simple structure, the proposed LTA has an O(N) complexity and is easy for implementation. The circuit having 8 cells was designed and simulated in a standard 0.35um CMOS process available through MOSIS, is operated via a 1.8V supply and dissipates 58μW of power per cell. Its operation is discussed and simulation results are reported.
AB - A CMOS high performance current mode loser-take-all (LTA) circuit is presented. Based on input currents average computation method, the circuit employs inhibitory and excitatory feedbacks, achieving both high speed and high resolution. The proposed circuit is suitable for operation in a wide variety of applications, such as self organizing neural networks, fuzzy systems and it also can be used to compute the global minimum of the input array. While having very simple structure, the proposed LTA has an O(N) complexity and is easy for implementation. The circuit having 8 cells was designed and simulated in a standard 0.35um CMOS process available through MOSIS, is operated via a 1.8V supply and dissipates 58μW of power per cell. Its operation is discussed and simulation results are reported.
UR - http://www.scopus.com/inward/record.url?scp=27644598165&partnerID=8YFLogxK
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AN - SCOPUS:27644598165
SN - 0780387155
T3 - 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
SP - 234
EP - 237
BT - 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
T2 - 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
Y2 - 13 December 2004 through 15 December 2004
ER -