High speed and high resolution current loser-take-all circuit of O(N) complexity

Alexander Fish, Vadim Milrud, Orly Yadid-Pecht

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A CMOS high performance current mode loser-take-all (LTA) circuit is presented. Based on input currents average computation method, the circuit employs inhibitory and excitatory feedbacks, achieving both high speed and high resolution. The proposed circuit is suitable for operation in a wide variety of applications, such as self organizing neural networks, fuzzy systems and it also can be used to compute the global minimum of the input array. While having very simple structure, the proposed LTA has an O(N) complexity and is easy for implementation. The circuit having 8 cells was designed and simulated in a standard 0.35um CMOS process available through MOSIS, is operated via a 1.8V supply and dissipates 58μW of power per cell. Its operation is discussed and simulation results are reported.

Original languageEnglish
Title of host publication11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
Pages234-237
Number of pages4
StatePublished - 2004
Externally publishedYes
Event11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004 - Tel Aviv, Israel
Duration: 13 Dec 200415 Dec 2004

Publication series

Name11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004

Conference

Conference11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
Country/TerritoryIsrael
CityTel Aviv
Period13/12/0415/12/04

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