Abstract
A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35 -μm CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 131-135 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 52 |
| Issue number | 3 |
| DOIs | |
| State | Published - 5 Mar 2005 |
| Externally published | Yes |
Keywords
- Analog circuits
- CMOS analog integrated circuits
- analog integrated circuits
- neural networks
- winner take all (WTA)