High-Speed and High-Precision Current Winner-Take-All Circuit

Alexander Fish; Vadim Milrud; Orly Yadid-Pecht

doi:10.1109/tcsii.2004.842062

High-Speed and High-Precision Current Winner-Take-All Circuit

Alexander Fish, Vadim Milrud, Orly Yadid-Pecht

Research output: Contribution to journal › Article › peer-review

45 Scopus citations

Abstract

A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35 -μm CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.

Original language	English
Pages (from-to)	131-135
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	52
Issue number	3
DOIs	https://doi.org/10.1109/tcsii.2004.842062
State	Published - 5 Mar 2005
Externally published	Yes

Keywords

Analog circuits
CMOS analog integrated circuits
analog integrated circuits
neural networks
winner take all (WTA)

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10.1109/tcsii.2004.842062

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@article{133bcee6087c4b22bd212d85bebfac63,

title = "High-Speed and High-Precision Current Winner-Take-All Circuit",

abstract = "A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35 -μm CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.",

keywords = "Analog circuits, CMOS analog integrated circuits, analog integrated circuits, neural networks, winner take all (WTA)",

author = "Alexander Fish and Vadim Milrud and Orly Yadid-Pecht",

year = "2005",

month = mar,

day = "5",

doi = "10.1109/tcsii.2004.842062",

language = "אנגלית",

volume = "52",

pages = "131--135",

journal = "IEEE Transactions on Circuits and Systems II: Express Briefs",

issn = "1549-7747",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

}

TY - JOUR

T1 - High-Speed and High-Precision Current Winner-Take-All Circuit

AU - Fish, Alexander

AU - Milrud, Vadim

AU - Yadid-Pecht, Orly

PY - 2005/3/5

Y1 - 2005/3/5

N2 - A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35 -μm CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.

AB - A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35 -μm CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.

KW - Analog circuits

KW - CMOS analog integrated circuits

KW - analog integrated circuits

KW - neural networks

KW - winner take all (WTA)

UR - http://www.scopus.com/inward/record.url?scp=15944424556&partnerID=8YFLogxK

U2 - 10.1109/tcsii.2004.842062

DO - 10.1109/tcsii.2004.842062

M3 - ???researchoutput.researchoutputtypes.contributiontojournal.article???

AN - SCOPUS:15944424556

SN - 1549-7747

VL - 52

SP - 131

EP - 135

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

IS - 3

ER -

High-Speed and High-Precision Current Winner-Take-All Circuit

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Keywords

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