Hazard-freedom checking in speed-independent systems

Husnu Yenigun, Vladimir Levin, Doron Peled, Peter A. Beerel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

We describe two approaches to use the model checking tool COSPAN to check the hazard freedom in speed-independent circuits. First, we propose a straight forward approach to implement a speed- independent circuit in S/R. Second, we propose a reduction technique over the first approach by restricting the original system with certain constraints. This reduction is implemented on the top of COSPAN which also applies its own reductions, including symbolic representation (BDD).

Original languageEnglish
Title of host publicationCorrect Hardware Design and Verification Methods - 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME 1999, Proceedings
EditorsLaurence Pierre, Thomas Kropf
PublisherSpringer Verlag
Pages317-321
Number of pages5
ISBN (Print)3540665595, 9783540665595
DOIs
StatePublished - 1999
Externally publishedYes
Event10th IFIP WG 10.5 Working Conference on Correct Hardware Design and Verification Methods, CHARME 1999 - Bad Herrenalb, Germany
Duration: 27 Sep 199929 Sep 1999

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume1703
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference10th IFIP WG 10.5 Working Conference on Correct Hardware Design and Verification Methods, CHARME 1999
Country/TerritoryGermany
CityBad Herrenalb
Period27/09/9929/09/99

Bibliographical note

Publisher Copyright:
© Springer-Verlag Berlin Heidelberg 1999.

Funding

FundersFunder number
Semiconductor Research Corporation98-DJ-486

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