Abstract
In many applications, the deployed system is required to adjust to unpredictable changes in environments and real-time circumstances. Finite State Machine (FSM) is a computational model that is widely used for control in digital designs. In this study, we assume that the FSM behavioral model ought to adapt to a changing environment, whose characteristics are unknown in advance. To achieve this goal, instead of synthesizing the combinational logic from a predefined behavioral model, we utilize Tsetlin Machine (TM) design to construct the targeted logic functions through learning. The paper presents an approach to hardware implementation of a TM-based adaptive FSM that can be applied to ASIC. The implementation is validated and tested on an FPGA platform. The data collected from the measurements provides valuable insights into the learning process, such as the connection between the organization of the clauses that are formed by the TM and the resulting learning rate.
Original language | English |
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Title of host publication | 2024 International Symposium on the Tsetlin Machine, ISTM 2024 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9798331504984 |
DOIs | |
State | Published - 2024 |
Event | 3rd International Symposium on the Tsetlin Machine, ISTM 2024 - Pittsburgh, United States Duration: 28 Aug 2024 → 30 Aug 2024 |
Publication series
Name | 2024 International Symposium on the Tsetlin Machine, ISTM 2024 |
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Conference
Conference | 3rd International Symposium on the Tsetlin Machine, ISTM 2024 |
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Country/Territory | United States |
City | Pittsburgh |
Period | 28/08/24 → 30/08/24 |
Bibliographical note
Publisher Copyright:©2024 IEEE.
Keywords
- Tsetlin Automaton
- Tsetlin Machine
- adaptive FSM
- reconfigurable hardware