Abstract
Bus encoding is a technique for decreasing the power consumption of a chip by reducing the number of bit transitions during data transmission over a bus or during memory write operations. Designers often concatenate a bus encoder with an error correcting code (ECC) encoder to guarantee the reliable and power-aware transmission of data. This paper introduces a structured technique for hardening bus-encoders to enable single error correction (SEC) while maintaining power awareness. The method is based on expurgating the Hamming code in a specific manner. The resulting power-aware (expurgated), SEC code can serve as an add-on solution, when it is desired to add error correction to an existing bus-encoder.
| Original language | English |
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| Title of host publication | Proceedings - 2024 29th IEEE European Test Symposium, ETS 2024 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9798350349320 |
| DOIs | |
| State | Published - 2024 |
| Event | 29th IEEE European Test Symposium, ETS 2024 - The Hague, Netherlands Duration: 20 May 2024 → 24 May 2024 |
Publication series
| Name | Proceedings of the European Test Workshop |
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| ISSN (Print) | 1530-1877 |
| ISSN (Electronic) | 1558-1780 |
Conference
| Conference | 29th IEEE European Test Symposium, ETS 2024 |
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| Country/Territory | Netherlands |
| City | The Hague |
| Period | 20/05/24 → 24/05/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
Keywords
- Bus encoding technique
- Power aware coding
- Single error correction (SEC)