Abstract
Consider a workload comprising a consecutive sequence of program execution segments, where each segment can either be executed on general purpose processor or offloaded to a hardware accelerator. An analytical optimization framework based on MultiAmdhal framework and Lagrange multipliers, for selecting the optimal set of accelerators and for allocating resources among them under constrained area is proposed. Due to the practical implementation of accelerators, the optimal architecture under area constraints may exclude some of the accelerators. As the fraction of the workload that can be accelerated decreases, resources (e.g. area) may shift from accelerators into the general purpose processor. The framework can be extended in a number of ways, spanning from SoC partitioning, bandwidth to power distribution, energy and other constrained resources.
Original language | English |
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Article number | 6327178 |
Pages (from-to) | 37-40 |
Number of pages | 4 |
Journal | IEEE Computer Architecture Letters |
Volume | 13 |
Issue number | 1 |
DOIs | |
State | Published - Jan 2014 |
Externally published | Yes |
Bibliographical note
Publisher Copyright:© 2002-2011 IEEE.
Keywords
- Chip Multiprocessors
- Modeling of computer architecture
- MultiAmdahl