Gate-diffusion input (GDI)-a technique for low power design of digital circuits: analysis and characterization

Arkadiy Morgenshtein, A. Fish, A Israel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


GDI (Gate Diffusion Input) - a new technique of low power digital circuit design is described. This technique allows reducing power consumption, delay and area of digital circuits, while maintaining low complexity of logic design. Performance comparison with traditional CMOS and various PTL design techniques is presented, with respect to the layout area, number of devices, delay and power dissipation, showing advantages and drawbacks of GDI as compared to other methods. A variety of logic gates have been implemented in 0.35 μm technology to compare the GDI technique with CMOS and PTL. A prototype test chip of 8-bit CLA adder has been fabricated, based on GDI and CMOS cell libraries, showing up to 45% reduction in power-delay product in GDI. Properties of implemented circuits are discussed, simulation results are reported and measurements of a test chip are presented.
Original languageAmerican English
Title of host publicationIEEE International Symposium on Circuits and Systems
StatePublished - 2002

Bibliographical note

Place of conference:USA


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