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Gain-Cell Embedded DRAMs: Modeling and Design Space
Andrea Bonetti
, Roman Golman
, Robert Giterman
,
Adam Teman
, Andreas Burg
Bar-Ilan University - The Alexander Kofkin Faculty of Engineering
NanoElectronics - The Emerging Nanoscaled Integrated Circuits & Systems (EnICS) Labs
Swiss Federal Institute of Technology Lausanne
Research output
:
Contribution to journal
›
Article
›
peer-review
8
Scopus citations
Overview
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Keyphrases
Gain Cell
100%
EDRAM
100%
Memory Models
100%
Memory Design
100%
Modeling Tools
100%
Design Space
100%
Gain-cell Embedded DRAM (GC-eDRAM)
100%
Modelling Space
100%
Memory Architecture
40%
Transistor
20%
Level Effect
20%
Low Power
20%
CMOS Technology
20%
Bitcell
20%
Design Optimization
20%
FDSOI Technology
20%
Random Variation
20%
Circuit Architecture
20%
Static Random Access Memory
20%
Context Modeling
20%
Memory Size
20%
Stored Data
20%
UTBB FD-SOI
20%
28 Nm CMOS
20%
CMOS Bulk
20%
Bulk Process
20%
Design Practice
20%
Access Delay
20%
Maximum Deviation
20%
Dynamic Random Access Memory
20%
Six Sigma
20%
Storage Cell
20%
Technology Architecture
20%
Architectural Transformation
20%
Tool Model
20%
Cycle Frequency
20%
Transistor Level
20%
Large Design Space
20%
Engineering
Design Space
100%
Dynamic Random Access Memory
100%
Tasks
33%
Process Variation
33%
Context Modeling
33%
Process Step
33%
Optimal Design
33%
Random Process
33%
Random Access Memory
33%
Design Optimization
33%
Access Delay
33%
Cycle Frequency
33%
Architectural Transformation
33%
Computer Science
Dynamic Random Access Memory
100%
Complex Task
33%
Process Variation
33%
Static Random Access Memory
33%
Memory Architecture
33%
Design Practice
33%
Circuit Technology
33%
Interdependent Variable
33%
Design Optimization
33%
Cycle Frequency
33%
Material Science
Transistor
100%
Density
50%
Electronic Circuit
50%