TY - GEN
T1 - FireBird
T2 - 35th Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2013
AU - Cojbasic, Radisav
AU - Cogal, Omer
AU - Meinerzhagen, Pascal
AU - Senning, Christian
AU - Slater, Conor
AU - Maeder, Thomas
AU - Burg, Andreas
AU - Leblebici, Yusuf
PY - 2013/11/7
Y1 - 2013/11/7
N2 - PowerPC Architecture microcontrollers are commonly used in embedded applications. In this work we present FireBird, the first PowerPC based SoC for reliable operation beyond 200°C. Designing SoCs for reliable operation at high temperatures is a significant challenge, due to increased static leakage current, reduced carrier mobility, and increased electro-migration. To alleviate the consequences of high temperatures, this paper proposes to customize a PowerPC e200 based SoC by using a dynamically reconfigurable clock frequency, exhaustive clock gating, and electromigration-resistant power supply rings. A 20×9 mm2 chip implementing this design has been fabricated in 0.35 μm CMOS technology. The custom testing procedure showed the expected maximum operating frequency reduction from 38MHz at room-temperature to 30 MHz at 200°C, which illustrates the importance of an adaptable clock frequency under temperature variation. At 200°C, the maximum power dissipation at 3.3 V supply voltage was 1.2W and the idle state static leakage current was 3.4 mA. Silicon measurements proved that this design outperforms PowerPC based SoCs available in the high-temperature microcontrollers market which are not operational at temperatures above 125°C.
AB - PowerPC Architecture microcontrollers are commonly used in embedded applications. In this work we present FireBird, the first PowerPC based SoC for reliable operation beyond 200°C. Designing SoCs for reliable operation at high temperatures is a significant challenge, due to increased static leakage current, reduced carrier mobility, and increased electro-migration. To alleviate the consequences of high temperatures, this paper proposes to customize a PowerPC e200 based SoC by using a dynamically reconfigurable clock frequency, exhaustive clock gating, and electromigration-resistant power supply rings. A 20×9 mm2 chip implementing this design has been fabricated in 0.35 μm CMOS technology. The custom testing procedure showed the expected maximum operating frequency reduction from 38MHz at room-temperature to 30 MHz at 200°C, which illustrates the importance of an adaptable clock frequency under temperature variation. At 200°C, the maximum power dissipation at 3.3 V supply voltage was 1.2W and the idle state static leakage current was 3.4 mA. Silicon measurements proved that this design outperforms PowerPC based SoCs available in the high-temperature microcontrollers market which are not operational at temperatures above 125°C.
UR - http://www.scopus.com/inward/record.url?scp=84892653008&partnerID=8YFLogxK
U2 - 10.1109/cicc.2013.6658519
DO - 10.1109/cicc.2013.6658519
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AN - SCOPUS:84892653008
SN - 9781467361460
T3 - Proceedings of the Custom Integrated Circuits Conference
BT - Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 22 September 2013 through 25 September 2013
ER -