In standard design-processes of electronic systems much effort and expertise is required from engineers to produce a hardware description of the system and from this abstraction point, automation and synthesis tools bring the design to the gate level. In recent years, automatic tools have been developed whose purpose is to translate high-level languages directly into hardware language and thus to automatically realize a system up to the level of logic gates efficiently. The automatic tools strive to be as optimal as possible according to the needs of the application, but it appears in the article that there are concrete difficulties for the tools to do this optimally and that the intervention of the designer is still needed to achieve best results. In the paper we investigate and present how such tools work, what results are reached when simple symmetric and asymmetric structures are provided as inputs. And finally, we show how sub-optimal results are achieved either when vast freedom is given to the tool with multiple optimization parameters, and when complex optimization metrics are targeted, a task such tools are not specifically designed to solve. Even though, we posh forward that when numerous optimization pragmas are available by the tools, and as designs and optimization targets get more complex, such situations are quite inevitable. We highlight that additional flexibility is still needed to set complex constraints by the tools and that more automation is required. We demonstrate, on a simple example, gradually increasing complexity, towards an FFT processor (which generalizes many use cases), that significant gains can be achieved for complex structures needed in modern computation. The proposed automation is directed to aid the tools and the designer to better reach optimal implementations.
|Title of host publication||LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings|
|Editors||Monica Karel Huerta|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - 2023|
|Event||14th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2023 - Quito, Ecuador|
Duration: 27 Feb 2023 → 3 Mar 2023
|Name||LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings|
|Conference||14th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2023|
|Period||27/02/23 → 3/03/23|
Bibliographical notePublisher Copyright:
© 2023 IEEE.
- Design Automation
- Design tools
- High Level Synthesis
- Multi parameter