Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster

Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gurkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro-Panades, Edith Beigne, Fabien Clermidy, Philippe Flatresse, Luca Benini

Research output: Contribution to journalArticlepeer-review

47 Scopus citations

Abstract

This article presents an ultra-low-power parallel computing platform and its system-on-chip (SoC) embodiment, targeting a wide range of emerging near-sensor processing tasks for Internet of Things (IoT) applications. The proposed SoC achieves 193 million operations per second (MOPS) per mW at 162 MOPS (32 bits), improving the first-generation Parallel Ultra-Low-Power (PULP) architecture by 6.4 and 3.2 times in performance and energy efficiency, respectively.

Original languageEnglish
Article number8065010
Pages (from-to)20-31
Number of pages12
JournalIEEE Micro
Volume37
Issue number5
DOIs
StatePublished - 1 Sep 2017
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 1981-2012 IEEE.

Funding

This work is supported by the European FP7 ERC Advanced project MULTITHERMAN (g.a. 291125) and by the Swiss National Science Foundation (SNF) project (no. 162524) “MicroLearn: Micropower Deep Learning.” We thank STMicroelectronics for chip fabrication.

FundersFunder number
FP7 ERC291125
Micropower Deep Learning
Schweizerischer Nationalfonds zur Förderung der Wissenschaftlichen Forschung162524

    Keywords

    • UTBB FD-SOI
    • body biasing
    • energy efficiency
    • parallel processing
    • power management

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