Abstract
Dot-product is frequently used in many signal processing applications, and for this reason digital signal processors (DSPs) commonly include hardware units to speed up its calculation. In this paper, we propose a new circuit architecture for dot-product hardware units. This design fuses all the steps of the dot-product computation into a unit called a fused dot-product multiplier (FDPM), resulting in enhancements in performance, power and area vs. designs such as multiply-accumulate (MAC) units. We designed and implemented the FDPM in 28-nanometer and 65-nanometer technologies. Comparison of the fused unit to an implementation by an EDA design compiler showed that our architecture consumed 38% less power and 30% less area for the same clock cycle. Comparison to a previously proposed FDPM architecture showed a per-bit 1.9X - 4.7X energy reduction. Analysis of the dependence of the per-bit power consumption on vector length and word-width indicated a good match between theory and practice.
Original language | English |
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Title of host publication | 2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 115-122 |
Number of pages | 8 |
ISBN (Electronic) | 9781509015030 |
DOIs | |
State | Published - 28 Nov 2016 |
Event | 27th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016 - London, United Kingdom Duration: 6 Jul 2016 → 8 Jul 2016 |
Publication series
Name | Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors |
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Volume | 2016-November |
ISSN (Print) | 1063-6862 |
Conference
Conference | 27th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016 |
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Country/Territory | United Kingdom |
City | London |
Period | 6/07/16 → 8/07/16 |
Bibliographical note
Publisher Copyright:© 2016 IEEE.
Keywords
- Computer arithmetic
- dot-product
- multipliers