Enabling full associativity with memristive address decoder

Leonid Yavits, Roman Kaplan, Ran Ginosar

Research output: Contribution to journalArticlepeer-review

Abstract

Address decoders are typically built using regular logic gates. A novel Memristive Perfect Induction gate replaces standard NAND, allowing for storing the address alongside data and comparing it to the input address, thus transforming the address decoder into CAM and enabling fully associative access. Applications include fully associative TLB, cache, and virtually addressable memory.

Original languageEnglish
Article number8474950
Pages (from-to)32-40
Number of pages9
JournalIEEE Micro
Volume38
Issue number5
DOIs
StatePublished - 1 Sep 2018
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 1981-2012 IEEE.

Keywords

  • M\memory control and access
  • cache memories
  • content addressable memory
  • emerging technologies
  • hardware
  • memory hierarchy
  • virtual memory

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