Abstract
It is well-established that unsynchronized communication across clock domains can result in metastable upsets and that this cannot be avoided deterministically. This, however, does not preclude the possibility that metastability can be contained deterministically, in the sense that meaningful and precise computations can be performed despite metastability of some bits. In this work, we provide evidence that this is not only possible, but can also be done efficiently. We propose a circuit of size O(B2) and depth O(B) that computes the minimum and maximum of two B-bit Gray code inputs, where each input may contain one metastable bit (introducing uncertainty regarding whether it encodes some value x or rather x + 1). This is achieved by combining the results of a recursive call on the (B - 1)-bit suffixes in a metastability-containing way. This overcomes the problem posed by possible metastability of the logic controlling the recursion, which must occur in some executions.
Original language | English |
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Title of host publication | Proceedings - 22nd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2016 |
Publisher | IEEE Computer Society |
Pages | 49-56 |
Number of pages | 8 |
ISBN (Electronic) | 9781467390071 |
DOIs | |
State | Published - 5 Oct 2016 |
Externally published | Yes |
Event | 22nd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2016 - Porto Alegre, Brazil Duration: 8 May 2016 → 11 May 2016 |
Publication series
Name | Proceedings - International Symposium on Asynchronous Circuits and Systems |
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Volume | 2016-October |
ISSN (Print) | 2643-1394 |
ISSN (Electronic) | 2643-1483 |
Conference
Conference | 22nd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2016 |
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Country/Territory | Brazil |
City | Porto Alegre |
Period | 8/05/16 → 11/05/16 |
Bibliographical note
Publisher Copyright:© 2016 IEEE.
Keywords
- combinational circuits
- metastability worst-case propagation model
- sorting networks