TY - JOUR

T1 - Efficient Implementation of Punctured Parallel Finite Field Multipliers

AU - Neumeier, Yaara

AU - Pesso, Yehoshua

AU - Keren, Osnat

N1 - Publisher Copyright:
© 2004-2012 IEEE.

PY - 2015/9/1

Y1 - 2015/9/1

N2 - Finite field multipliers are embedded in many applications. In some applications, e.g., in cryptographic primitives protected by security oriented codes, only r bits out of the m-bit product are required. In such cases, the circuit area can be significantly reduced by implementing a punctured finite field multiplier. This article deals with efficient implementation of multipliers. It is shown that the number of binary operations (equivalently, the number of gates) depends on both the chosen irreducible polynomial that defines the finite field and the indices of the r coordinates that are computed. Upper and lower bounds are presented on the implementation cost of punctured multipliers over a finite field defined by an irreducible trinomial, and a set of r coordinates that achieves the lower bound is itemized.

AB - Finite field multipliers are embedded in many applications. In some applications, e.g., in cryptographic primitives protected by security oriented codes, only r bits out of the m-bit product are required. In such cases, the circuit area can be significantly reduced by implementing a punctured finite field multiplier. This article deals with efficient implementation of multipliers. It is shown that the number of binary operations (equivalently, the number of gates) depends on both the chosen irreducible polynomial that defines the finite field and the indices of the r coordinates that are computed. Upper and lower bounds are presented on the implementation cost of punctured multipliers over a finite field defined by an irreducible trinomial, and a set of r coordinates that achieves the lower bound is itemized.

KW - Digital arithmetic

KW - Finite field multiplier

KW - Galois field

KW - Multiplying circuit

UR - http://www.scopus.com/inward/record.url?scp=84940978487&partnerID=8YFLogxK

U2 - 10.1109/TCSI.2015.2451914

DO - 10.1109/TCSI.2015.2451914

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AN - SCOPUS:84940978487

SN - 1549-8328

VL - 62

SP - 2260

EP - 2267

JO - IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

JF - IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

IS - 9

M1 - 7229372

ER -