Efficient dense and sparse matrix multiplication on GP-SIMD

Amir Morad, Leonid Yavits, Ran Ginosar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

We present efficient Dense and Sparse Matrix Multiplication on GP-SIMD, a hybrid general purpose SIMD computer architecture that eliminates synchronization by in-memory computing, combining data storage and massively parallel processing. Cycle-accurate simulation of on a large set of matrices shows enhanced power efficiency relative to conventional architectures.

Original languageEnglish
Title of host publication2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479954124
DOIs
StatePublished - 10 Nov 2014
Externally publishedYes
Event2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014 - Palma de Mallorca, Spain
Duration: 29 Sep 20141 Oct 2014

Publication series

Name2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014

Conference

Conference2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014
Country/TerritorySpain
CityPalma de Mallorca
Period29/09/141/10/14

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

Keywords

  • Associative Processor
  • GP-SIMD
  • In-Memory Computing
  • Memory Intensive Computing
  • Sparse Linear Algebra

Fingerprint

Dive into the research topics of 'Efficient dense and sparse matrix multiplication on GP-SIMD'. Together they form a unique fingerprint.

Cite this