Effect of Different Metallic Contacts on the Device Performance of a p-n Heterostructure of a Topological Insulator and Silicon (p-Bi2Te3/n-Si)

Faizan Ahmad, Kavindra Kandpal, Naresh Kumar, Rachana Kumar, Pramod Kumar

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9 Scopus citations

Abstract

This article investigates the performance of the p-Bi2Te3/n-Si heterostructure diode with different metallic contacts. The heterostructure was realized by the thermal coating of a topological insulator (TI) Bi2Te3 film on n-Si. The crystal phase study of the Bi2Te3 film was done by X-ray diffraction (XRD), while the microstructural and morphological study was done by scanning electron microscopy (SEM) and atomic force microscopy (AFM). The CV characterization for the diode showed almost no hysteresis except for the gold (Au) contact device, which could be due to the trapping of electrons at the interface. The current-voltage (IV) measurement was done in the dark, which confirmed the formation of p-n diode heterostructure. Diode having platinum (Pt) metallic contact exhibited the best ideality factor (n = 7.00), while the diode with gold (Au) contact closely followed it (n = 8.91). The best figure of merit (FOM≈2.588 was observed for Pt contact device with the maximum rectification ratio (RR 442 and majority charge carrier concentration $({\mathrm{N}}_{\mathrm{A}})=1.47 \times {10}^{25}/{\mathrm{cm}}^{3}$. The experimental results of ${I-{V}}$ for different contact devices were further simulated using the two-diode model and various diode parameters were extracted. The current density-voltage (JV) and local ideality factor-voltage (nV) plots were studied to find the ideality factor and recombination current (J02) for different metallic contact devices. The Pt contact diode was found to be nearest to the ideal behavior of a diode exhibiting the least recombination current $({\mathrm{J}}_{02})=9.7\times {10}^{-17} \mathrm{A}/{\mathrm{cm}}^{2}$.

Original languageEnglish
Article number9237153
Pages (from-to)5388-5395
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume67
Issue number12
DOIs
StatePublished - Dec 2020
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 1963-2012 IEEE.

Funding

Manuscript received July 6, 2020; revised August 27, 2020; accepted October 2, 2020. Date of publication October 22, 2020; date of current version November 24, 2020. This work was supported by DST, Government of India. The review of this article was arranged by Editor B. Hoex. (Corresponding author: Pramod kumar.) Faizan Ahmad and Pramod Kumar are with the Spintronics and Magnetic Materials Laboratory, Department of Applied Sciences, IIIT Allahabad, Prayagraj 211012, India (e-mail: [email protected]; [email protected]).

FundersFunder number
Department of Science and Technology, Government of West Bengal

    Keywords

    • Bismuth telluride (Bi₂Te₃)/silicon (Si)
    • diode optimization
    • heterostructure
    • p-n diode
    • topological insulator (TI) film

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