Abstract
The saturated cores Fault Current Limiter (FCL) is one of the leading candidates for providing a commercial robust solution to the fault current problem. Basically, the saturated cores FCL offers low impedance during normal grid operation due to its saturated cores state and high impedance in fault events due to cores desaturation. We developed a method to obtain the nonlinear inductance curve L(I) of the saturated cores FCL from which we show that the dynamic inductance component, dL/dt, contributes significantly to the FCL limiting capabilities. Specifically, we show that in some parts of the AC cycle, the dynamic inductance term dominates over the static inductance in contributing to the voltage drop across the device. We conclude that the design of saturated cores FCL should consider the dynamic inductance and calculate its contribution to the FCL voltage to benefit from better device performances.
Original language | English |
---|---|
Pages (from-to) | 579-583 |
Number of pages | 5 |
Journal | Journal of Superconductivity and Novel Magnetism |
Volume | 28 |
Issue number | 2 |
DOIs | |
State | Published - Feb 2014 |
Bibliographical note
Publisher Copyright:© 2014, Springer Science+Business Media New York.
Funding
This work was supported in part by the Israeli Ministry of Energy and Water.
Funders | Funder number |
---|---|
Israeli Ministry of Energy and Water |
Keywords
- Fault current limiter
- High-power applications
- Magnetic cores
- Smart grids
- Superconducting devices